1. Field of the Invention
The present invention relates to a solid-state imaging device, a signal processing method of the solid-state imaging device and an imaging apparatus, particularly, relates to a so-called column type solid-state imaging device, a signal processing method of the solid-state imaging device and an imaging apparatus using the solid-state imaging device.
2. Description of the Related Art
As a type of the solid-state imaging device, in an amplification type solid-state imaging device as a kind of an X-Y address type solid-state imaging device, for example, a CMOS solid-state imaging device, a technology called as a column type in which independent column processing units are provided at respective pixel columns with respect to the pixel array units in which pixels including photoelectric conversion elements are two-dimensionally arranged in a matrix state, signals (pixel signals) are sequentially read by each pixel row from respective pixels of the pixel array unit and temporarily held in the column processing units, and pixel signals of one row are sequentially read at the prescribed timings.
The column-type CMOS solid-state imaging device includes, as signal processing circuits which process pixel signals of one row read from the column processing unit, for example, an output amplifier amplifying and outputting pixel signals sequentially as voltage signals, a variable gain amplifier amplifying the voltage signals at any of gains among gains which are minutely set, an AD (analog/digital) converter converting the pixel signals whose voltages are amplified into digital signals.
In this kind of solid-state imaging device, the AD converters having 12-bit precision, 14-bit precision and the like are generally developed and used. When the number of bits of the AD converter is increased, the power consumption is increased, therefore, it is drastically difficult to improve the bit precision further due to noise included in the circuit itself. Accordingly, in the column type solid-state imaging device of related arts, it is difficult to improve the bit precision and difficult to expand the dynamic range while keeping S/N in good condition.
As a measure of the above problem, there is proposed a column-type CMOS solid-state imaging device which expands the dynamic range of signals of one screen while keeping S/N in good condition by including a configuration in which a pixel signal amplification unit is provided at each pixel column of the pixel array unit, the size of the pixel signal is detected and again is set to the pixel signal amplification unit according to the size of the signal, as well as processing of correcting the gain set in the pixel signal amplification unit at each pixel column is performed with respect to a digital pixel signal which is AD converted in the converter, thereby expanding the dynamic range of signals of one screen while keeping S/N in good condition (for example, refer to JP-A-2005-175517 (Patent Document 1)).
Additionally, there is also proposed a column-type CMOS solid-state imaging device in which a pulse signal having the size in the time axis direction (pulse width) corresponding to the size of a pixel signal by comparing the pixel signal with a reference signal of the ramp waveform in a comparator in the column processing unit provided at each pixel column of the pixel array unit, a prescribed clock is counted by a counter in a period of the pulse width of the pulse signal and AD conversion is performed to the counted value by allowing the counted value to be a digital signal according to the size of the pixel signal (for example, refer to JP-A-2005-303648 (Patent Document 2)).
In the above CMOS solid-state imaging device, a so-called digital CDS (Correlated Double Sampling) processing is performed, in which a noise component (hereinafter referred to as a “P phase signal”) outputted just after the reset from pixels is counted down, and a true signal component (hereinafter, referred to as a “D phase signal”) according to the received light amount outputted from the pixels after that is counted up by using an up/down counter as the counter, and the difference between the P phase signal and D phase signal is taken to remove noise components such as fixed pattern noise or reset noise.